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Off-Axis 4H N Type SiC Semiconductor Wafer, Research Grade,3”Size

XIAMEN POWERWAY ADVANCED MATERIAL CO., LTD.
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XIAMEN POWERWAY ADVANCED MATERIAL CO., LTD.

Off-Axis 4H N Type SiC Semiconductor Wafer, Research Grade,3”Size

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Product Details

Off-Axis 4H N Type SiC Semiconductor Wafer, Research Grade,3”Size
 

PAM-XIAMEN offers semiconductor silicon carbide wafers,6H SiC and 4H SiC in different quality grades for researcher and industry manufacturers. We has developed SiC crystal growth technology and SiC crystal wafer processing technology,established a production line to manufacturer SiCsubstrate,Which is applied in GaNepitaxydevice,powerdevices,high-temperature device and optoelectronic Devices. As a professional company invested by the leading manufacturers from the fields of advanced and high-tech material research and state institutes and China’s Semiconductor Lab,weare devoted to continuously improve the quality of currently substrates and develop large size substrates.

 

Here shows detail specification:
SILICON CARBIDE MATERIAL PROPERTIES
 

PolytypeSingle Crystal 4HSingle Crystal 6H
Lattice Parametersa=3.076 Åa=3.073 Å
 c=10.053 Åc=15.117 Å
Stacking SequenceABCBABCACB
Band-gap3.26 eV3.03 eV
Density3.21 · 103 kg/m33.21 · 103 kg/m3
Therm. Expansion Coefficient4-5×10-6/K4-5×10-6/K
Refraction Indexno = 2.719no = 2.707
 ne = 2.777ne = 2.755
Dielectric Constant9.69.66
Thermal Conductivity490 W/mK490 W/mK
Break-Down Electrical Field2-4 · 108 V/m2-4 · 108 V/m
Saturation Drift Velocity2.0 · 105 m/s2.0 · 105 m/s
Electron Mobility800 cm2/V·S400 cm2/V·S
hole Mobility115 cm2/V·S90 cm2/V·S
Mohs Hardness~9~9

 
 

4H N Type SiC Semiconductor Wafer, Research Grade,3”Size

SUBSTRATE PROPERTYS4H-51-SI-PWAM-250 S4H-51-SI-PWAM-330 S4H-51-SI-PWAM-430
DescriptionResearch Grade 4H SEMI Substrate
Polytype4H
Diameter(50.8 ± 0.38) mm
Thickness(250 ± 25) μm (330 ± 25) μm (430 ± 25) μm
Resistivity (RT)>1E5 Ω·cm
Surface Roughness< 0.5 nm (Si-face CMP Epi-ready); <1 nm (C- face Optical polish)
FWHM<50 arcsec
Micropipe DensityA+≤1cm-2 A≤10cm-2 B≤30cm-2 C≤50cm-2 D≤100cm-2
Surface Orientation
On axis <0001>± 0.5°
Off axis 3.5° toward <11-20>± 0.5°
Primary flat orientationParallel {1-100} ± 5°
Primary flat length16.00 ± 1.70 mm
Secondary flat orientation Si-face:90° cw. from orientation flat ± 5°
C-face:90° ccw. from orientation flat ± 5°
Secondary flat length8.00 ± 1.70 mm
Surface FinishSingle or double face polished
PackagingSingle wafer box or multi wafer box
Usable area≥ 90 %
Edge exclusion1 mm

 

sic crystal defects

Most of the defects which were observed in SiC were also observed in other crystalline materials. Like the dislocations,

stacking faults (SFs), low angle boundaries (LABs) and twins. Some others appear in materials having the Zing- Blend or

the Wurtzite structure, like the IDBs. Micropipes and inclusions from other phases mainly appear in SiC.
High-Temperature Device Operation
The wide bandgap energy and low intrinsic carrier concentration of SiC allow SiC to maintain
semiconductor behavior at much higher temperatures than silicon, which in turn permits SiC semiconductor
device functionality at much higher temperatures than silicon . As discussed in basic
semiconductor electronic device physics textbooks, semiconductor electronic devices function
in the temperature range where intrinsic carriers are negligible so that conductivity is controlled by
intentionally introduced dopant impurities. Furthermore, the intrinsic carrier concentration
 is a fundamental prefactor to well-known equations governing undesired junction reverse-bias leakage
currents. As temperature increases, intrinsic carriers increase exponentially so that undesired leakage
currents grow unacceptably large, and eventually at still higher temperatures, the semiconductor
device operation is overcome by uncontrolled conductivity as intrinsic carriers exceed intentional
device dopings. Depending upon specific device design, the intrinsic carrier concentration of silicon
generally confines silicon device operation to junction temperatures <300°C. SiC’s much smaller
intrinsic carrier concentration theoretically permits device operation at junction temperatures exceeding
800°C. 600°C SiC device operation has been experimentally demonstrated on a variety of
SiC devices.
The ability to place uncooled high-temperature semiconductor electronics directly into hot
environments would enable important benefits to automotive, aerospace, and deep-well drilling
industries. In the case of automotive and aerospace engines, improved electronic telemetry and
control from high-temperature engine regions are necessary to more precisely control the combustion
process to improve fuel efficiency while reducing polluting emissions. High-temperature capability
eliminates performance, reliability, and weight penalties associated with liquid cooling, fans, thermal
shielding, and longer wire runs needed to realize similar functionality in engines using conventional
silicon semiconductor electronics.




























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