HEF4046BP very large scale integrated circuits Integrated Circuit Chip Phase-locked loop

Phase-locked loop HEF4046B MSI

DESCRIPTION

The HEF4046B is a phase-locked loop circuit that consists of a linear voltage controlled oscillator (VCO) and two different phase comparators with a common signal input amplifier and a common comparator input. A 7 V regulator (zener) diode is provided for supply voltage regulation if necessary.

HEF4046BP(N): 16-lead DIL; plastic (SOT38-1)

HEF4046BD(F): 16-lead DIL; ceramic (cerdip) (SOT74)

HEF4046BT(D): 16-lead SO; plastic (SOT109-1)

( ): Package Designator North America

FUNCTIONAL DESCRIPTION

VCO part

The VCO requires one external capacitor (C1) and one or two external resistors (R1 or R1 and R2). Resistor R1 and capacitor C1 determine the frequency range of the VCO. Resistor R2 enables the VCO to have a frequency off-set if required. The high input impedance of the VCO simplifies the design of low-pass filters; it permits the designer a wide choice of resistor/capacitor ranges. In order not to load the low-pass filter, a source-follower output of the VCO input voltage is provided at pin 10. If this pin (SFOUT) is used, a load resistor (RSF) should be connected from this pin to VSS; if unused, this pin should be left open. The VCO output (pin 4) can either be connected directly to the comparator input (pin 3) or via a frequency divider. A LOW level at the inhibit input (pin 5) enables the VCO and the source follower, while a HIGH level turns off both to minimize stand-by power consumption.

Phase comparators

The phase-comparator signal input (pin 14) can be direct-coupled, provided the signal swing is between the standard HE4000B family input logic levels. The signal must be capacitively coupled to the self-biasing amplifier at the signal input in case of smaller swings. Phase comparator 1 is an EXCLUSIVE-OR network. The signal and comparator input frequencies must have a 50% duty factor to obtain the maximum lock range. The average output voltage of the phase comparator is equal to 1⁄ 2 VDD when there is no signal or noise at the signal input. The average voltage to the VCO input is supplied by the low-pass filter connected to the output of phase comparator 1. This also causes the VCO to oscillate at the centre frequency (fo). The frequency capture range (2 fc) is defined as the frequency range of input signals on which the PLL will lock if it was initially out of lock. The frequency lock range (2 fL) is defined as the frequency range of input signals on which the loop will stay locked if it was initially in lock. The capture range is smaller or equal to the lock range.

With phase comparator 1, the range of frequencies over which the PLL can acquire lock (capture range) depends on the low-pass filter characteristics and this range can be made as large as the lock range. Phase comparator 1 enables the PLL system to remain in lock in spite of high amounts of noise in the input signal. A typical behaviour of this type of phase comparator is that it may lock onto input frequencies that are close to harmonics of the VCO centre frequency. Another typical behaviour is, that the phase angle between the signal and comparator input varies between 0° and 180° and is 90° at the centre frequency. Figure 3 shows the typical phase-to-output response characteristic.

Functional diagram

PINNING

1. Phase comparator pulse output

2. Phase comparator 1 output

3. Comparator input

4. VCO output

5. Inhibit input

6. Capacitor C1 connection A

7. Capacitor C1 connection B

8. VSS

9. VCO input

10. Source-follower output

11. Resistor R1 connection

12. Resistor R2 connection

13. Phase comparator 2 output

14. Signal input

15. Zener diode input for regulated supply.

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