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MM74HCT138M Integrated Circuit Chip low power 3-to-8 Line Decoder

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Anterwell Technology Ltd.

MM74HCT138M Integrated Circuit Chip low power 3-to-8 Line Decoder

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City & Province shenzhen guangdong
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Product Details

 

MM74HCT138

3-to-8 Line Decoder

 

General Description

The MM74HCT138 decoder utilizes advanced silicon-gate CMOS technology, and are well suited to memory address decoding or data routing applications. Both circuits feature high noise immunity and low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic.

 

The MM74HCT138 have 3 binary select inputs (A, B, and C). If the device is enabled these inputs determine which one of the eight normally HIGH outputs will go LOW. Two active LOW and one active HIGH enables (G1, G2A and G2B) are provided to ease the cascading decoders.

 

The decoders’ output can drive 10 low power Schottky TTL equivalent loads and are functionally and pin equivalent to the 74LS138. All inputs are protected from damage due to static discharge by diodes to VCC and ground.

 

MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.

 

Features

■ TTL input compatible

■ Typical propagation delay: 20 ns

■ Low quiescent current: 80 µA maximum (74HCT Series)

■ Low input current: 1 µA maximum

■ Fanout of 10 LS-TTL loads

 

Connection Diagram

 

Logic Diagram

 

Absolute Maximum Ratings (Note 2) (Note 3)

Supply Voltage (VCC)                                                       −0.5 to +7.0V

DC Input Voltage (VIN)                                              −1.5 to VCC +1.5V

DC Output Voltage (VOUT)                                        −0.5 to VCC +0.5V

Clamp Diode Current (IIK, IOK)                                                    ±20 mA

DC Output Current, per pin (IOUT)                                              ±25 mA

DC VCC or GND Current, per pin (ICC)                                       ±50 mA

Storage Temperature Range (TSTG)                           −65°C to +150°C

Power Dissipation (PD)

    (Note 4)                                                                                 600 mW

    S.O. Package only                                                                 500 mW

Lead Temperature (TL) (Soldering 10 seconds)                          260°C


Note 2: Absolute Maximum Ratings are those values beyond which damage to the device may occur.

Note 3: Unless otherwise specified all voltages are referenced to ground.

Note 4: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C.

 

 

 

 

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