CY7C68013A-128AXC - Cypress Semiconductor - EZ-USB FX2LP USB Microcontroller

Quick Detail:

EZ-USB FX2LP USB Microcontroller

Description:

Cypress’s EZ-USB® FX2LP (CY7C68013A/14A) is a low power version of the EZ-USB FX2(CY7C68013), which is a highly integrated, low power USB 2.0 microcontroller. By integrating the USB 2.0 transceiver, serial interface engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip,Cypress has created a cost effective solution that provides superior time-to-market advantages with low power to enable bus powered applications.

The ingenious architecture of FX2LP results in data transfer rates of over 53 Mbytes per second, the maximum allowable USB 2.0 bandwidth, while still using a low cost 8051 microcontroller in a package as small as a 56 VFBGA (5 mm x 5 mm). Because it incorporates the USB 2.0 transceiver, the FX2LP is more economical, providing a smaller footprint solutionthan USB 2.0 SIE or external transceiver implementations. With EZ-USB FX2LP, the Cypress Smart SIE handles most of the USB 1.1 and 2.0 protocol in hardware, freeing the embedded microcontroller for application specific functions and decreasing development time to ensure USB compatibility.

The General Programmable Interface (GPIF) and Master/Slave Endpoint FIFO (8-bit or 16-bit data bus) provides an easy and glueless interface to popular interfaces such as ATA, UTOPIA, EPP, PCMCIA, and most DSP/processors.

The FX2LP draws less current than the FX2 (CY7C68013), has double the on-chip code/data RAM, and is fit, form and function compatible with the 56, 100, and 128 pin FX2.Five packages are defined for the family: 56 VFBGA, 56 SSOP, 56 QFN, 100 TQFP, and 128 TQFP.

Applications:

• USB 2.0–USB-IF high speed certified (TID # 40440111)

• Single-chip integrated USB 2.0 transceiver, smart SIE, and enhanced 8051 microprocessor

• Fit, form and function compatible with the FX2

— Pin-compatible

— Object-code-compatible

— Functionally-compatible (FX2LP is a superset)

• Ultra Low power: ICC no more than 85 mA in any mode

— Ideal for bus and battery powered applications

• Software: 8051 code runs from:

— Internal RAM, which is downloaded via USB

— Internal RAM, which is loaded from EEPROM

— External memory device (128 pin package)

• 16 KBytes of on-chip Code/Data RAM

• Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints

— Buffering options: double, triple, and quad

• Additional programmable (BULK/INTERRUPT) 64-byte endpoint

• 8- or 16-bit external data interface

• Smart Media Standard ECC generation

• GPIF (General Programmable Interface)

— Allows direct connection to most parallel interface

— Programmable waveform descriptors and configuration registers to define waveforms

— Supports multiple Ready (RDY) inputs and Control

(CTL) outputs

• Integrated, industry-standard enhanced 8051

— 48-MHz, 24-MHz, or 12-MHz CPU operation

— Four clocks per instruction cycle

— Two USARTS

— Three counter/timers

— Expanded interrupt system

— Two data pointers

• 3.3V operation with 5V tolerant inputs

• Vectored USB interrupts and GPIF/FIFO interrupts

• Separate data buffers for the Set-up and Data portions of a CONTROL transfer

• Integrated I2C controller, runs at 100 or 400 kHz

• Four integrated FIFOs

— Integrated glue logic and FIFOs lower system cost

— Automatic conversion to and from 16-bit buses

— Master or slave operation

— Uses external clock or asynchronous strobes

— Easy interface to ASIC and DSP ICs

• CY7C68014A: Ideal for battery powered applications

— Suspend current: 100 µA (typ)

• CY7C68013A: Ideal for non-battery powered applications

— Suspend current: 300 µA (typ)

• Available in four lead-free packages with up to 40 GPIOs

— 128-pin TQFP (40 GPIOs), 100-pin TQFP (40 GPIOs),

56-pin QFN (24 GPIOs) and 56-pin SSOP (24 GPIOs)

Specifications:

Competitive Advantage:

Warranty :180 days !
Free shipping: Order over $1000 win a free shipment fee
(goods weight below 3Kg) ,during 20130901-20130930 .

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