Ipc HDI High Density Pcb Design For LPDDR3 Socket Interposer Stack Up 4-2-4

2.0mm HDI PCBs for LPDDR3 Socket Interposer stack up 4-2-4  immersion gold 

1 . Descriptions:

DDR4, like its predecessor (DDR3), requires a new design approach when considering implementation. There are obviously several changes in design requirements to accommodate the upgraded performance, but it is a side effect of innovation. However, following the proper design and topology techniques will yield the highest degree of performance from this new, now current generational standard.

2 . Specifications:

What is the PCB Layout Changes Needed for DDR4 Implementation?

DDR4 or Double Data Rate 4 comes in two distinct module types. So-DIMM or small outline dual in-line memory modules (260-pins) that are in use in portable computing devices like laptops. The other module type is DIMM or dual in-line memory modules (288-pins) that are in use in devices like desktops and servers.

So, the first change in architecture is, of course, due to the pin count. The previous iteration (DDR3) uses 240-pins for a DIMM and 204-pins for a So-DIMM. Whereas the previously mentioned, DDR4 uses 288-pins for its DIMM application. With the increase in pins or contacts, DDR4 offers higher DIMM capacities, enhanced data integrity, faster download speed, and an increase in power efficiency.

Accompanying this overall improvement in performance is also a curved design (bottom) that enables better, more secure attachment, and it improves stability and strength during installation. Also, there are bench tests that confirm that DDR4 offers a 50% increase in performance and can achieve up to 3,200 MTs (Mega Transfers per Second).

Furthermore, it achieves these increases in performance in spite of using less power; 1.2 volts (per DIMM) instead of the 1.5 to 1.35-volt requirement of its predecessor. All of these changes mean that the PCB designers must reassess their design approach for the implementation of DDR4.