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Core I3-6100U SR2EU CPU Processor Chip I3 Series (3MB Cache,up to 2.3GHz ) - Notebook CPU
The Core i3-6100U is an ULV (ultra low voltage) dual-core SoC based on the Skylake
architecture and has been launched in September 2015. The CPU can
be found in ultrabooks as well as normal notebooks. In addition to
two CPU cores with Hyper-Threading clocked at 2.3 GHz (no Turbo
Boost), the chip also integrates an HD Graphics 520 GPU and a
dual-channel DDR4-2133/DDR3L-1600 memory controller. The SoC is
manufactured using a 14 nm process with FinFET transistors.
| Processor number | i3-6100U |
| Family | Core i3 Mobile |
| Technology (micron) | 0.014 |
| Processor speed (GHz) | 2.3 |
| L2 cache size (KB) | 512 |
| L3 cache size (MB) | 3 |
| The number of cores | 2 |
| EM64T | Supported |
| HyperThreading technology | Supported |
| Virtualization technology | Supported |
| Enhanced SpeedStep technology | Supported |
| Execute-Disable bit feature | Supported |
General Information:
| Type | CPU / Microprocessor |
| Market segment | Mobile |
| Family | |
| Model number | |
| CPU part number |
|
| Frequency | 2300 MHz |
| Clock multiplier | 23 |
| Package | 1356-ball micro-FCBGA |
| Socket | BGA1356 |
| Size | 1.65" x 0.94" / 4.2cm x 2.4cm |
| Introduction date | September 1, 2015 (announcement) September 1, 2015 (availability in Asia) September 27, 2015 (availability elsewhere) |
Architecture Microarchiteture:
| Microarchitecture | Skylake |
| Processor core | Skylake-U |
| Core stepping | D1 (SR2EU) |
| Manufacturing process | 0.014 micron |
| Data width | 64 bit |
| The number of CPU cores | 2 |
| The number of threads | 4 |
| Floating Point Unit | Integrated |
| Level 1 cache size | 2 x 32 KB 8-way set associative instruction caches 2 x 32 KB 8-way set associative data caches |
| Level 2 cache size | 2 x 256 KB 4-way set associative caches |
| Level 3 cache size | 3 MB 12-way set associative shared cache |
| Physical memory | 32 GB |
| Multiprocessing | Not supported |
| Extensions and Technologies |
|
| Low power features | Enhanced SpeedStep technology |
Integrated peripherals / components:
| Display controller | 3 displays |
| Integrated graphics | GPU Type: HD 520 Graphics tier: GT2 Microarchitecture: Gen 9 LP Execution units: 24 Base frequency (MHz): 300 Maximum frequency (MHz): 1000 |
| Memory controller | The number of controllers: 1 Memory channels: 2 Supported memory: LPDDR3-1600, LPDDR3-1866, DDR4-1866, DDR4-2133 Maximum memory bandwidth (GB/s): 34.1 |
| Other peripherals |
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Electrical / Thermal parameters:
| Maximum operating temperature | 100°C |
| Thermal Design Power | 15Watt |
