DS2430AP+ EEPROM MSP430FR2100IPW16R DRV5055A4QDBZR Memory Data Storage

DS2430AP+ Electrically Erasable Programmable Read-Only Memory MSP430FR2100IPW16R DRV5055A4QDBZR Memory Data Storage

FEATURES

 256-bit Electrically Erasable Programmable Read Only Memory (EEPROM) plus 64-bit one-time programmable application register

 Unique, factory-lasered and tested 64-bit registration number (8-bit family code + 48-bit serial number + 8-bit CRC tester) assures absolute identity because no two parts are alike

 Built-in multidrop controller ensures compatibility with other MicroLAN products

 EEPROM organized as one page of 32 bytes for random access

 Reduces control, address, data, and power to a single data pin

 Directly connects to a single port pin of a microprocessor and communicates at up to 15.3kbits per second

 8-bit family code specifies DS2430A communication requirements to reader

 Presence detector acknowledges when reader first applies voltage

 Low cost TO-92 or 6-pin TSOC and UCSP surface mount package

 Reads and writes over a wide voltage range of 2.8V to 5.25V from -40°C to +85°C

DESCRIPTION

The DS2430A 256-bit 1-Wire® EEPROM identifies and stores relevant information about the product to which it is associated. This lot or product specific information can be accessed with minimal interface, for example a single port pin of a microcontroller. The DS2430A consists of a factory-lasered registration number that includes a unique 48-bit serial number, an 8-bit CRC, and an 8-bit Family Code (14h) plus 256 bits of user-programmable EEPROM and a 64-bit one-time programmable application register. The power to read and write the DS2430A is derived entirely from the 1-Wire communication line. Data is transferred serially via the 1-Wire protocol, which requires only a single data lead and a ground return. The 48-bit serial number that is factory-lasered into each DS2430A provides a guaranteed unique identity that allows for absolute traceability. The TO-92 and TSOC packages provide a compact enclosure that allows standard assembly equipment to handle the device easily for attachment to printed circuit boards or wiring. Typical applications include storage of calibration constants, board identification, and product revision status.

OVERVIEW

The block diagram in Figure 1 shows the relationships between the major control and memory sections of the DS2430A. The DS2430A has four main data components: 1) 64-bit lasered ROM, 2) 256-bit EEPROM data memory with scratchpad, 3) 64-bit one-time programmable application register with scratchpad and 4) 8-bit status memory. The hierarchical structure of the 1-Wire protocol is shown in Figure 2. The bus master must first provide one of the four ROM Function Commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM. The protocol required for these ROM Function Commands is described in Figure 8. After a ROM Function Command is successfully executed, the memory functions become accessible and the master can provide any one of the four memory function commands. The protocol for these memory function commands is described in Figure 6. All data is read and written least significant bit first

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