PC16550DV complex integrated circuits PC16550D Universal Asynchronous Receiver/Transmitter with FIFOs

PC16550D Universal Asynchronous Receiver/Transmitter with FIFOs²

Features

► Capable of running all existing 16450 software.

► Pin for pin compatible with the existing 16450 except for CSOUT (24) and NC (29). The former CSOUT and NC pins are TXRDY and RXRDY, respectively.

► After reset, all registers are identical to the 16450 register set.

► In the FIFO mode transmitter and receiver are each buffered with 16 byte FIFO’s to reduce the number of interrrupts presented to the CPU.

►Adds or deletes standard asynchronous communication bits (start, stop, and parity) to or from the serial data.

► Holding and shift registers in the 16450 Mode eliminate the need for precise synchronization between the CPU and serial data.

General Description

  The PC16550D is an improved version of the original 16450 Universal Asynchronous Receiver/Transmitter (UART). Functionally identical to the 16450 on powerup (CHARACTER mode)* the PC16550D can be put into an alternate mode (FIFO mode) to relieve the CPU of excessive software overhead.

  In this mode internal FIFOs are activated allowing 16 bytes (plus 3 bits of error data per byte in the RCVR FIFO) to be stored in both receive and transmit modes. All the logic is on chip to minimize system overhead and maximize system efficiency. Two pin functions have been changed to allow signalling of DMA transfers.

Capacitance TA e 25§C, VDD e VSS e 0V

Timing Waveforms

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