8 Channel SMD / SMT 8 Bit Microcontrollers MCU Microconverter ADUC842BCPZ62-5

ADUC842BCPZ62-5 8 Channel SMD/SMT 8-bit Microcontrollers MCU Microconverter 1-cycle version

ANOMALIES

1. Mode 0 UART Operation [er001]

Background: UART Mode 0 allows the UART to function in an 8-bit shift register mode.

Issue: UART Mode 0 is nonfunctional on the ADuC841/ADuC842/ADuC843.

Workaround: None.

Related Issues: None.

2.Use of the Extended Stack Pointer [er002]

Background: The extended stack pointer allows the stack to overflow into internal XRAM.

Issue: A PUSH onto the extended stack when it is the first instruction within a subroutine results in the return address being overwritten. Workaround: For Assembly code, insert a NOP as the first instruction in any subroutine. For C code, there is currently no workaround. Related Issues: None.

3. Use of I2 C in Slave Mode with Stop Interrupt Enabled [er003]产品标题

Background: In slave mode, the I2 C interface can be configured to generate an interrupt due to a start, repeated start, data, or stop condition. The I2 C interrupt decode bits (I2CID0 and I2CID1) in I2CCON indicate the source of the interrupt. If the stop interrupt is enabled via the I2CSI bit, an interrupt is generated when the slave receives a stop condition

Issue A: In the I2 C interrupt service routine, if the I2CI bit or I2CDAT register is accessed during a stop interrupt, the I2 C bus will fail to respond to further I2 C communication.

Workaround A: When a stop interrupt is detected, the user should reset the I2 C bus by using the I2CRS bit.

Issue B: When the stop interrupt is enabled, on occasion the I2 C interrupt decode bits indicate that a start, repeated start, or DATA interrupt occurred when the source was in fact a stop interrupt. If this happens the user may try to clear I2CI or read I2CDAT, resulting in the bus failing to respond to further I2 C communication.

Workaround B: Tie the SCLOCK pin to an I/O pin; This allows the state of SCLOCK to be read. SCLOCK is high only during an interrupt if the source is a stop interrupt. Related

Issues: er004: Use of I2 C in slave mode with stop interrupt disabled.