Active Member
|
[China]
Address: Rm 712, Jude Bldg, Zhengfeng South RD., Fuyong Street, Baoan District, Shenzhen, Guandong, China
Contact name:Henry Fan
Vantron Technology Limited |
|
(2x15pin/2.0) the black connector pin sequence:
Pin no | Symbol | Function | Pin no | Symbol | Function |
1 | LCD-VDD | Power for Panel | 16 | RXOC+ | LVDS ODD Clock + Signal |
2 | LCD-VDD | Power for Panel | 17 | RXO3- | LVDS ODD 3 - Signal |
3 | LCD-VDD | Power for Panel | 18 | RXO3+ | LVDS ODD 3 + Signal |
4 | GND | Ground | 19 | RXE0- | LVDS EVEN 0 - Signal |
5 | GND | Ground | 20 | RXE0+ | LVDS EVEN 0 + Signal |
6 | GND | Ground | 21 | RXE1- | LVDS EVEN 1 - Signal |
7 | RXO0- | LVDS ODD 0 - Signal | 22 | RXE1+ | LVDS EVEN 1 + Signal |
8 | RXO0+ | LVDS ODD 0 + Signal | 23 | RXE2- | LVDS EVEN 2 - Signal |
9 | RXO1- | LVDS ODD 1 - Signal | 24 | RXE2+ | LVDS EVEN 2 + Signal |
10 | RXO1+ | LVDS ODD 1 + Signal | 25 | GND | Ground |
11 | RXO2- | LVDS ODD 2 - Signal | 26 | GND | Ground |
12 | RXO2+ | LVDS ODD 2 + Signal | 27 | RXEC- | LVDS EVEN Clock - Signal |
13 | GND | Ground | 28 | RXEC+ | LVDS EVEN Clock + Signal |
14 | GND | Ground | 29 | RXE3- | LVDS EVEN 3 - Signal |
15 | RXOC- | LVDS ODD Clock - Signal | 30 | RXE3+ | LVDS EVEN 3 + Signal |
30pin connector pin sequence (the connector to LCD LVDS interface):
PIN # | SIGNAL NAME | DESCRIPTION |
1 | VCC | Negative LVDS differential data input (Odd data) |
2 | VCC | Positive LVDS differential data input (Odd data) |
3 | VCC | Negative LVDS differential data input (Odd data) |
4 | NC | Positive LVDS differential data input (Odd data) |
5 | NC | Negative LVDS differential data input (Odd data, H-Sync,V-Sync,DSPTMG) |
6 | NC | Positive LVDS differential data input (Odd data, H-Sync,V-Sync,DSPTMG) |
7 | GND | Ground |
8 | RxOIN0- | Negative LVDS differential clock input (Odd clock) |
9 | RxOIN0+ | Positive LVDS differential clock input (Odd clock) |
10 | RxOIN1- | Negative LVDS differential data input (Odd data) |
11 | RxOIN1+ | Positive LVDS differential data input (Odd data) |
12 | RxOIN2- | Negative LVDS differential data input (Even data) |
13 | RxOIN2+ | Positive LVDS differential data input (Even data) |
14 | GND | Ground |
15 | CLK- | Negative LVDS differential data input (Even data) |
16 | CLK+ | Positive LVDS differential data input (Even data) |
17 | GND | Ground |
18 | RxOIN3- | Negative LVDS differential data input (Even data) |
19 | RxOIN3+ | Positive LVDS differential data input (Even data) |
20 | RB0- | Negative LVDS differential clock input (Even clock) |
21 | RB0+ | Positive LVDS differential clock input (Even clock) |
22 | RB1- | Negative LVDS differential data input (Even data) |
23 | RB1+ | Positive LVDS differential data input (Even data) |
24 | GND | Ground |
25 | RB2- | Ground |
26 | RB2+ | No Connection |
27 | CLK2- | Ground |
28 | CLK2+ | Power Supply |
29 | RB3- | Power Supply |
30 | RB3+ | Power Supply |
