Pb Free 72x72 6.5 Gbps VSC3172XJN-02 Analog Digital IC

VSC3172XJN-02 Analog & Digital Crosspoint ICs 6.5 Gbps 72x72 Crosspoint Switch Pb-Free

1. FEATURES

6.5 Gbps 72 × 72 strictly nonblocking switch matrix with multicast and output striping programming modes
Fourth-generation input signal equalization (ISE) with programmable control globally or on a per-channel basis
Adjustable output pre-emphasis EQ
Differential current mode logic (CML) data output driver
Protocol-independent switching and data transmission
10-W typical power dissipation
33 mm × 33 mm, 1.27 mm pin pitch, 613-pin FCBGA package Parallel and serial programming modes for configuration and monitoring
Software control to optimize power dissipation

2.BENEFIT

468-Gbps aggregate bandwidth in a single chip for high-density network storage, FC, blade server, and Ethernet systems
Addresses system-level and board-level signal integrity (SI) and intersymbol interface (ISI) jitter issues
EQ and drive flexibility for driving boards, cables, and circuit traces Convenient I/O flexibility for interfacing with multiple standards
Can be used with latest storage, Ethernet, and networking standards Low 140-mW per-channel power dissipation`
Layout-friendly package and pinout for easier PCB design Programming and control convenience
Controlled power reduction for unused ports

3.APPLICATIONS

Core and metro transport
Enterprise` Blade servers
High-speed automated test equipment
Broadcast video systems
Storage, Ethernet, and networking equipment

4.BLOCK DIAGRAM

5.GENERAL DESCRIPTION

The VSC3172 is a 72 × 72 asynchronous crosspoint switch, designed to carry broadband data streams. The fully nonblocking switch core is programmed through a multimode port interface that allows random access programming of each input and output port. A high degree of signal integrity is maintained throughout the device by fully differential signal paths. Programmable input EQ and output pre-emphasis settings enable maximum customization for the application. Each data output can be programmed to connect to one of the inputs. The signal path is unregistered and fully asynchronous, so there are no restrictions on the phase, frequency, or signal pattern on any input.
Each high-speed output is a fully differential switched current driver with on-die terminations for maximum signal integrity. Its multimode programming interface allows commands to be sent as serial data or as multiplexed parallel data. Core programming can be sequential on a port-by-port basis, or multiple program assignments can be queued and issued simultaneously.
Unused channels may be powered down to allow efficient use of the switch in applications that require only a subset of the channels. Power-down is enabled in software by programming individual unused outputs with a power-down code.

6.BACKPLANE APPLICATION

7.SPECIFICATION

6.5-Gbps NRZ per-channel data rate
2.5-V power supply (2.5-V or 3.3-V program port power supply)
2.5-V or 3.3-V CMOS TTL-compatible I/O
Differential CML I/O with integrated termination impedance
0 °C to 85 °C operating temperature range

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