E-Elements Technology Co.,LTD |
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Overview
The DN7020k10 is a complete logic emulation system that enables
ASIC or IP designers a vehicle to prototype logic and memory
designs for a fraction of the cost of existing solutions. The
DN7020k10 is stand-alone or hosted via a USB interface. A single
DN7020k10 configured with 20 Altera Stratix 3SL340s can emulate up
to 52 million gates of logic as measured by LSI. This product is
pin-compatible with Stratix IV, so in 2009 we will be able to
provide a cool 104 million ASIC gates when utilizing the 4SE680.
This ASIC gate estimate does not include the embedded memories and
multipliers resident in each FPGA. The DN7020k10 achieves high gate
density and allows for fast target clock frequencies by utilizing
FPGAs from Altera's Stratix III (or IV) FPGA family for logic and
memory. All FPGA resources are available for the target
application. Any subset of FPGAs can be stuffed and each FPGA
position can be stuffed with any available speed grade.
Stratix III FPGAs from Altera
High I/O-count, 1760-pin, flip-chip BGA packages are utilized.
Abundant interconnects are provided between the FPGAs. All pins of
all banks of each FPGA are utilized. Where appropriate, FPGA to
FPGA busses are routed and tested unidirectional LVDS, run at
600MHz+ (1.2Gb/s) but can be used single-ended at a reduced speed.
Example designs utilizing the integrated I/O block shift registers
with DDR (double data rate) for pin multiplexing are included. Two
separate 48-pin main busses (MBUS48A and MBUS48B) are connected to
all FPGAs. Bus switches on the rows allow for highter performance
main bus operation if a subset of FPGAs is stuffed.
Daughter cards
The DN7020k10 is easily adaptable to all applications via daughter
cards. Eight separate 400-pin FCI MEG-Array connectors allow for
customization via expansion. Signals to/from these cards are routed
differentially where appropriate and can run at the limit of the
FPGA: 600MHz. Clocks, resets, and abubndant(fused) power are
included in each connector. Signals are routed from the FPGAs on a
bank basis, and the daughter card selects the I/O voltage of the
connector by driving the VccI/O of the FPGA bank. The I/O voltage ranges are +1.5V to +3.3V. The DNMEG_Intercon card can be used to convert any two adjacent connectors to
interconnect.
Memory
Six separate DDR2 SODIMM sockets are connected to FPGAs
1,2,3,16,17, and 18. Each socket is tested to 350MHz with a DDR2
SODIMM. Standard, off-the-shelf DDR2 memory DIMMs (PC2-5300) work
nicely and we can provide these for a small charge. We have
developed alternative SODIMMs that can be stuffed into these
positions. Consult the factory for more details, but the list
includes FLASH, SSRAM, QDR SSRAM, RLDRAM I/II, SDR SDRAM, mictors,
DDR1, DDR3, and others.
Easy Configuration via Compact Flash or USB
The configuration bit files for the FPGAs are copied onto a
128-megabyte Compact FLASH card(provided) and an on-board Cypress
microporcessor controls the FPGA configuration process. FPGA
configuration can also be controlled via the USB interface. Fully
stuffed, the DN7020k10 configures in less than 60 seconds.
Visibility into the configuration process is enhanced with an RS232
port. Sanity checks are performed automatically on the
configuration bit files streamlining the configuration process.
Multiple LEDs provide instant status and operational feedback.
Laboratory testing is showing that the amount of light provided by the LEDs is enough to illuminate a rock concert from the big hair era of American rock and roll, notably the (arguably) mediocre Bon Jovi, or perhaps, the better Twisted Sister.
As always, reference material such as DDR2 SDRAM controllers, flash controllers, et al. is included (in Verilog, VHDL, C) at no additional cost.
19" Rackmount Chassis
The DN7020k10 comes standard mounted to a base plate and enclosed
in a 19", 4U-high, rackmount chassis. The chassis is shipped with a
Zippy Technology Corporation power supply rated at 600 watts with
an AC input voltage range of 100~240 VAC. The front panel has an
LCD display with an ON/OFF switch for power, and momentary switches
for HARD RESET and LOGIC RESET. The front panel connectors suppo