GENERAL DESCRIPTIONS
The W25Q128FV (128M-bit) Serial Flash memory provides a storage
solution for systems with limited space, pins and power. The
25Q series offers flexibility and performance well beyond ordinary
Serial Flash devices. They are ideal for code shadowing to
RAM, executing code directly from Dual/Quad SPI (XIP) and
storing voice, text and data. The device operates on a single 2.7V
to 3.6V power supply with current consumption as low as 4mA
active and 1µA for power-down. All devices are offered in
space-saving packages.
The W25Q128FV array is organized into 65,536 programmable pages of
256-bytes each. Up to 256 bytes can be programmed at a time.
Pages can be erased in groups of 16 (4KB sector erase), groups of
128 (32KB block erase), groups of 256 (64KB block erase) or
the entire chip (chip erase). The W25Q128FV has 4,096 erasable
sectors and 256 erasable blocks respectively. The small 4KB sectors
allow for greater flexibility in applications that require
data and parameter storage. (See Figure 2.)
The W25Q128FV support the standard Serial Peripheral Interface
(SPI), Dual/Quad I/O SPI as well as 2-clocks instruction cycle Quad
Peripheral Interface (QPI): Serial Clock, Chip Select, Serial Data
I/O0 (DI),I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock
frequencies of up to 104MHz are supported allowing
equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and
416MHz (104MHz x 4) for Quad I/O when using the Fast Read
Dual/Quad I/O and QPI instructions. These transfer rates can
outperform standard Asynchronous 8 and 16-bit Parallel Flash
memories. The Continuous Read Mode allows for efficient
memory access with as few as 8-clocks of instruction-overhead to
read a 24-bit address, allowing true XIP
(execute in place) operation. A Hold pin, Write Protect pin
and programmable write protection, with top or bottom array
control, provide further control flexibility. Additionally,
the device supports JEDEC standard manufacturer and device
ID and SFDP Register, a 64-bit Unique Serial Number and three
256-bytes Security Registers
FEATURES
•New Family of SpiFlash Memories
(1)W25Q128FV: 128M-bit / 16M-byte (2)Standard SPI: CLK,
/CS, DI, DO, /WP, /Hold (3)Software & Hardware
Reset
•Highest Performance Serial Flash
(1)104MHz Single, Dual/Quad SPI clocks (2)208/416MHz
equivalent Dual/Quad SPI (3)50MB/S continuous data
transfer rate
(4)More than 100,000 erase/program cycles (5)More than
20-year data retention
•Efficient “Continuous Read” and QPI Mode
(1)ontinuous Read with 8/16/32/64-Byte Wrap (2)As few
as 8 clocks to address memory (3)Quad Peripheral
Interface (QPI) reduces
•instruction overhead
(1)Allows true XIP (execute in place) operation
(2)Outperforms X16 Parallel Flash
| PIN NO. | PIN NAME | I/O | FUNCTION |
| 1 | /CS | I | Chip Select Input |
| 2 | DO (IO1) | I/O | Data Output (Data Input Output 1) |
| 3 | /WP (IO2) | I/O | Write Protect Input ( Data Input Output 2) |
| 4 | GND | / | Ground |
