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New & Original 3-wire Serial EEPROMs 2K (256 x 8 or 128 x 16) AT93C66A-10SQ-2.7

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Anterwell Technology Ltd.

New & Original 3-wire Serial EEPROMs 2K (256 x 8 or 128 x 16) AT93C66A-10SQ-2.7

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City & Province shenzhen guangdong
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Product Details

 

3-wire Serial EEPROMs 2K (256 x 8 or 128 x 16) 4K (512 x 8 or 256 x 16)

AT93C56A

AT93C66A

 

Features

• Low-voltage and Standard-voltage Operation

  – 2.7 (VCC = 2.7V to 5.5V)

  – 1.8 (VCC = 1.8V to 5.5V)

• User-selectable Internal Organization

  – 2K: 256 x 8 or 128 x 16

  – 4K: 512 x 8 or 256 x 16

• 3-wire Serial Interface

• Sequential Read Operation

• 2 MHz Clock Rate (5V)

• Self-timed Write Cycle (10 ms Max)

• High Reliability

  – Endurance: 1 Million Write Cycles

  – Data Retention: 100 Years

• Automotive Grade, Extended Temperature, and Lead-free/Halogen-free

  Devices Available

• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP,

  and 8-ball dBGA2™ Packages

 

Description

The AT93C56A/66A provides 2048/4096 bits of serial electrically erasable programmable read-only memory (EEPROM) organized as 128/256 words of 16 bits each when the ORG pin is connected to VCC and 256/512 words of 8 bits each when it is tied to ground. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The AT93C56A/66A is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP, and 8-ball dBGA2™ packages.

 

Pin Configurations

  Pin Name    Function
  CS  Chip Select
  SK  Serial Data Clock
  DI  Serial Data Input
  DO  Serial Data Output
  GND  Ground
  VCC  Power Supply
  ORG  Internal Organization
  DC  Don’t Connect

 

 8-ball dBGA2                     8-lead SOIC                            8-lead TSSOP

        

 

    8-lead MAP                            8-lead PDIP                         

    

 

The AT93C56A/66A is enabled through the Chip Select pin (CS) and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is brought “high” following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part. The AT93C56A/66A is available in 2.7V to 5.5V and 1.8V to 5.5V versions.

 

Absolute Maximum Ratings*

Operating Temperature......................................−55°C to +125°C

Storage Temperature .........................................−65°C to +150°C

Voltage on Any Pin

with Respect to Ground........................................ −1.0V to +7.0V

Maximum Operating Voltage .......................................... 6.25V

DC Output Current........................................................ 5.0 mA

                                                                                                                    

*NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

 

Block Diagram

Note: When the ORG pin is connected to VCC, the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability of the internal 1 Meg ohm pullup, then the x 16 organization is selected. The feature is not available on the 1.8V devices.

 

 

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